解决方案

Substrate-Like (SLP) 印刷电路板

The Next-Generation of Semiconductor Packaging 解决方案.

The Glue That Holds It All Together.

For cost-effective solutions that enable multi-layer, RF, and chip-on-flex requirements bound for aero空间, 国防, 空间, 医疗, and telecommunications markets, cbin99仲博在线登录 offers substrate-like solutions that meet the low-loss, high-speed needs for high-可靠性 applications.

Are you wondering where inspiring innovation happens? Watch the video below.

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HyperBGA®

HyperBGA® fluoropolymer-based coreless semiconductor package allows your die to run at extremely high speeds. The combination of low-loss, low dielectric constant material and stripline cross-sections enables signal speeds surpassing 25 GHz. And, this signal speed can be much higher (>70 GHz) over shorter distances.

The PTFE material compliance combines with the dimensional stability of a copper-invar-copper ("CIC") center plane to enable a long field life for HyperBGA® by reducing and eliminating the BGA wear out, 模具开裂, 分层, and flip-chip bump fatigue of other plastic packages.

It's the solution for networking, 高端服务器, telecommunications, 军事, and 医疗 markets — any place where speed, 可靠性, and increased signal I/O must combine with reduced size, 重量, and power ("SWaP").

This low-stress flip-chip laminate package is ideal for multi-layer, RF, chip-on-flex, or any application requiring a system-in-package ("SiP") approach.

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CoreEZ®

CoreEZ® semiconductor package uses the HyperBGA® manufacturing platform to offer a thin core build-up flip-chip package with very dense core vias using a cost-sensitive material set. The core via density provides 199-micron via-to-via core pitch, resulting in an essentially coreless structure.

High core via density is achieved using smaller pads and the same 50-micron laser-drilled holes to produce HyperBGA® to unblock wiring channels through the core. This enables CoreEZ® to provide up to twice the number of signal layers as a standard build-up package that uses mechanically drilled core vias with large capture pads.

The result is a highly cost-effective solution that allows total stripline signal layers on both sides of the core. Component cost is further reduced by enabling die shrink through die-pad pitch reduction down to 180 microns, with 150 microns possible for specific applications. 也, the core's thinness provides improved power distribution and the ability to dissipate chip thermal power into the 印刷电路板.

CoreEZ® is an excellent choice for applications requiring low-cost build-up materials along with high 可靠性, 性能, and wireability. It is also well suited to aero空间 applications requiring radiation tolerance.

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Related Resources

Technical Bulletin

CoreEZ® technical bulletin

Technical Bulletin

HyberBGA® technical bulletin